Introduction
A specific configuration of multiple flip-flops is called a Shift Register. Shift Register are the basic building block for a wide variety of synchronous digital circuits. Shift registers are constructed by connecting several D flip-flops in a specific configuration. The configuration is dependent on the type of shift register. Different types of volatile digital memory, data converters, binary Counter, time delay generator and encoders are some of the applications of a shift register. Shift registers are synchronous and requires a clock signal to propagate data.
Only D Flip-flops can be used to construct shift registers. The following lists some types of shift registers of which, all of them can be used as both storage memory and data converters
FIFO = First In First Out
FILO = First In Last Out
SISO = Serial In Serial Out
SIPO = Serial In Parallel Out
PIPO = Parallel In Parallel Out
PISO = Parallel In Serial Out
Shift registers are synchronous devices, i.e they require a clock signal. Data is clocked into the shift register based on the type of the shift register. Data input to a shift register can be either Serial or Parallel. Serial Input shift registers takes in data serially one bit at a time. Each bit of serial data has to be accompanied with a clock signal for data propagation. Total number of clock pulse required for serial input is the total number of data bits. Parallel input only requires one clock pulse no matter the total number of data bits.
Data Propagation Through Shift Registers
Shift registers consists of multiple stages, each stage is made of a single D flip-flop. The maximum data bits that a specific shift register can handle depends on the type & the number of stages of the shift register. For example, a 6-bit SISO shift register has 6 stages. A single Data bit is first placed on the input of the shift register and a single clock pulse propagates it. The total number of clock pulses are as same as the total bits of data. For example, to load an 8-bit data on an 8-bit SIPO/SISO shift register, a total of 8 clock pulses are needed.
A SIPO requires n number of clock pulses for the input. Each clock pulse will propagate only one bit of data. The output data is presented on the n number of parallel outputs pins.
A PIPO shift register requires only 1 CLK pulse to propagate the data to the output. Assume the shift register is of n-bit i.e. it has n number of stages. The entire n-bit data is placed on the n-bit inputs of the shift register. Then a single clock pulse if applied. This clock propagates the entire n-bit data to the output of the shift register. The number of stages doesn’t matter.
A PISO is almost the same as a PIPO. In a PISO, the entire n-bit is placed on the n-bit input. But instead on 1 clock pulse like PIPO, a PISO requires n number of clock pulses. The data will go through the output as serial data stream. A PISO is opposite of a SIPO.
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