Set-Reset Latch
A latch has two inputs and two outputs. A latch is a digital electronic circuit that can hold its output indefinitely. The inputs can be of any combination of 0 & 1. The outputs are dependent on the input combinations. The two outputs are 2’s compliment of each other. The latch has 4 states but two main states, namely SET and Reset. This is why it is called a Bi-stable device. Bi-stable means 2 stable states. For a certain input condition, the output can become unstable. Apart from the SET, Reset & Invalid mode, there is also the Hold/Memory mode. In this mode, the latch hold the previous output state. The complete truth table is shown below.
A latch can be constructed by using only one type of logic gate (NOR or NAND). If only NOR gate is used, the latch is Active LOW and if only NAND gate is used, the latch is Active HIGH. Note that SR Latch is a combination logic circuit but it is a key component of making any synchronous logic element. A latch & digital memory always belongs in the same sentence. A latch is a type of digital memory called “Volatile Memory”
The most basic form of latch is a Set-Reset Latch (SR Latch for short). SR latch can also be considered as the most basic form of digital memory. It has two different states and it can hold these states indefinitely. The memory state works in a very simple way. For example, we have S=1 & R=0 i.e. SET state. We want to hold this state indefinitely. So after we have S=1 & R=0, we change the input to S=1, R=1. In the Memory state (S=1, R=1), the output will be as same as the previous state. In this case, SET state.
Invalid State
Note that, the SR latch has an invalid state. The input combination of S=0, R=0 is called invalid state. It is invalid because at this state both outputs of the SR Latch becomes identical. A latch is known as a bi-stable device. It means that the output of the latch will always be either LOW or HIGH. Also, the outputs are always compliment to each other. However, during invalid state, both outputs becomes identical (i.e. both 0 or both 1), which is unacceptable or invalid.
Gated SR-Latch
A gated S-R Latch is an SR latch that requires a gate enable signal to change state or respond to change in input. It is literally an S-R latch with gate enable signal. A gates S-R Latch has all properties and drawback of an S-R latch. The advantage of the gated S-R latch is that we can decide when to allow the input signals to the latch input. In a normal S-R latch, the signal is applied to the input immediately to the latch but the gated input allows the user to block the signal if they want. If the gate is disabled, the data input signals will not be applied to the latch inputs. The gate feature of the Gated SR latch is used for “data flow control”. Flow control is used to control the flow of data going in/out of any circuit/system.
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